dorsal/arxiv
View SchemaBio-RV: Low-Power Resource-Efficient RISC-V Processor for Biomedical Applications
| Authors | Vijay Pratap Sharma, Annu Kumar, Mohd Faisal Khan, Mukul Lokhande, Santosh Kumar Vishvakarma |
|---|---|
| Categories | |
| ArXiv ID | 2601.08428vv1 |
| URL | https://arxiv.org/abs/2601.08428 |
| License | http://creativecommons.org/licenses/by/4.0/ |
Abstract
This work presents Bio-RV, a compact and resource-efficient RISC-V processor intended for biomedical control applications, such as accelerator-based biomedical SoCs and implantable pacemaker systems. The proposed Bio-RV is a multi-cycle RV32I core that provides explicit execution control and external instruction loading with capabilities that enable controlled firmware deployment, ASIC bring-up, and post-silicon testing. In addition to coordinating accelerator configuration and data transmission in heterogeneous systems, Bio-RV is designed to function as a lightweight host controller, handling interfaces with pacing, sensing, electrogram (EGM), telemetry, and battery management modules. With 708 LUTs and 235 flip-flops on FPGA prototypes, Bio-RV, implemented in a 180 nm CMOS technology, operate at 50 MHz and feature a compact hardware footprint. According to post-layout results, the proposed architectural decisions align with minimal energy use. Ultimately, Bio-RV prioritises deterministic execution, minimal hardware complexity, and integration flexibility over peak computing speed to meet the demands of ultra-low-power, safety-critical biomedical systems.
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"abstract": "This work presents Bio-RV, a compact and resource-efficient RISC-V processor intended for biomedical control applications, such as accelerator-based biomedical SoCs and implantable pacemaker systems. The proposed Bio-RV is a multi-cycle RV32I core that provides explicit execution control and external instruction loading with capabilities that enable controlled firmware deployment, ASIC bring-up, and post-silicon testing. In addition to coordinating accelerator configuration and data transmission in heterogeneous systems, Bio-RV is designed to function as a lightweight host controller, handling interfaces with pacing, sensing, electrogram (EGM), telemetry, and battery management modules. With 708 LUTs and 235 flip-flops on FPGA prototypes, Bio-RV, implemented in a 180 nm CMOS technology, operate at 50 MHz and feature a compact hardware footprint. According to post-layout results, the proposed architectural decisions align with minimal energy use. Ultimately, Bio-RV prioritises deterministic execution, minimal hardware complexity, and integration flexibility over peak computing speed to meet the demands of ultra-low-power, safety-critical biomedical systems.",
"arxiv_id": "2601.08428",
"authors": [
"Vijay Pratap Sharma",
"Annu Kumar",
"Mohd Faisal Khan",
"Mukul Lokhande",
"Santosh Kumar Vishvakarma"
],
"categories": [
"eess.SP",
"cs.AR"
],
"license": "http://creativecommons.org/licenses/by/4.0/",
"title": "Bio-RV: Low-Power Resource-Efficient RISC-V Processor for Biomedical Applications",
"url": "https://arxiv.org/abs/2601.08428",
"version": "v1"
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