dorsal/arxiv
View SchemaTiny-Twin: A CPU-Native Full-stack Digital Twin for NextG Cellular Networks
| Authors | Ali Mamaghani, Ushasi Ghosh, Ish Kumar Jain, Srinivas Shakkottai, Dinesh Bharadia |
|---|---|
| Categories | |
| ArXiv ID | 2601.08217vv1 |
| URL | https://arxiv.org/abs/2601.08217 |
| License | http://creativecommons.org/licenses/by/4.0/ |
Abstract
Modern wireless applications demand testing environments that capture the full complexity of next-generation (NextG) cellular networks. While digital twins promise realistic emulation, existing solutions often compromise on physical-layer fidelity and scalability or depend on specialized hardware. We present Tiny-Twin, a CPU-Native, full-stack digital twin framework that enables realistic, repeatable 5G experimentation on commodity CPUs. Tiny-Twin integrates time-varying multi-tap convolution with a complete 5G protocol stack, supporting plug-and-play replay of diverse channel traces. Through a redesigned software architecture and system-level optimizations, Tiny-Twin supports fine-grained convolution entirely in software. With built-in real-time RIC integration and per User Equipment(UE) channel isolation, it facilitates rigorous testing of network algorithms and protocol designs. Our evaluation shows that Tiny-Twin scales to multiple concurrent UEs while preserving protocol timing and end-to-end behavior, delivering a practical middle ground between low-fidelity simulators and high-cost hardware emulators. We release Tiny-Twin as an open-source platform to enable accessible, high-fidelity experimentation for NextG cellular research.
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"date_created": "2026-02-17T05:53:15.112000Z",
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"abstract": "Modern wireless applications demand testing environments that capture the full complexity of next-generation (NextG) cellular networks. While digital twins promise realistic emulation, existing solutions often compromise on physical-layer fidelity and scalability or depend on specialized hardware. We present Tiny-Twin, a CPU-Native, full-stack digital twin framework that enables realistic, repeatable 5G experimentation on commodity CPUs. Tiny-Twin integrates time-varying multi-tap convolution with a complete 5G protocol stack, supporting plug-and-play replay of diverse channel traces. Through a redesigned software architecture and system-level optimizations, Tiny-Twin supports fine-grained convolution entirely in software. With built-in real-time RIC integration and per User Equipment(UE) channel isolation, it facilitates rigorous testing of network algorithms and protocol designs. Our evaluation shows that Tiny-Twin scales to multiple concurrent UEs while preserving protocol timing and end-to-end behavior, delivering a practical middle ground between low-fidelity simulators and high-cost hardware emulators. We release Tiny-Twin as an open-source platform to enable accessible, high-fidelity experimentation for NextG cellular research.",
"arxiv_id": "2601.08217",
"authors": [
"Ali Mamaghani",
"Ushasi Ghosh",
"Ish Kumar Jain",
"Srinivas Shakkottai",
"Dinesh Bharadia"
],
"categories": [
"cs.NI"
],
"license": "http://creativecommons.org/licenses/by/4.0/",
"title": "Tiny-Twin: A CPU-Native Full-stack Digital Twin for NextG Cellular Networks",
"url": "https://arxiv.org/abs/2601.08217",
"version": "v1"
},
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